In manufacturing of integrated circuits, the Damascene process is a common fabrication process for forming copper wires in integrated circuits. As presented in FIGS. 1A-1C, the Damascene process involves the following steps:                1. Deposition of a dielectric film 10 of a desired thickness tfilm on a substrate 12 (FIG. 1A);        2. Formation of a mask 14 on the surface of the film 10 by photolithography (FIG. 1B);        3. Etching away of dielectric material of the film 10 through the mask 14 to produce the desired pattern, e.g., trenches 16 in the film 10 (FIG. 1C); and        4. Filling of the etched trenches 16 with copper to produce wires, insulated from each other by the dielectric material that remains after etching.        
Rapid advancements are projected over the next decade relating to the use of new materials in the interconnects, e.g., from aluminum to copper to reduce the resistance of the metal wires, and from SiO2 to dielectrics with a lower dielectric constant k, commonly known as “low-k” materials. This change will reduce delay times on interconnect wires and minimize crosstalk between wires. Low-k dielectric materials are the materials whose dielectric constant is lower than that of silicon dioxide, which has a dielectric constant k=4. Disadvantageously, low k materials are susceptible to damage during the etching step of the Damascene process. This damage occurs primarily along sidewalls 20 of the etched trenches 16. The effect of sidewall damage is represented by an increase of the dielectric constant of the material along the sidewalls 20, which may degrade the overall performance of the manufactured integrated circuit.
As shown in FIG. 1C, the effect of the dielectric sidewall damage for the trenches 16 of the width W separated by the low-k dielectric material 22 of width S is presented as damaged portions td of the sidewalls 20 having the dielectric constant k+Δk, wherein the k is a dielectric constant of the undamaged film 10, while the Δk is a change of the dielectric constant due to the dielectric etching process.
Measurement of the extent of sidewall damage after etch is difficult, and once the film has been etched, conventional processes for performing dielectric constant measurements are not feasible.
It is therefore desirable to provide an accurate and precise measurement approach to acquire a measure of the extent of dielectric sidewall damage after etch of the dielectric structure.